Enhance CMAQ Performance to Meet Future Challenges: I/O Aspect David Wong AMAD, EPA October 20, 2009

Enhance CMAQ Performance to Meet Future Challenges: I/O AspectDavid WongAMAD, EPAOctober 20, 2009

Motivation

Seeing degradation of performance as the number of processors increase

Need to use large number of processors is inevitable

Over due

Background info

CMAQ performs I/O through IOAPI_3 IOAPI_3 operates in serial mode PARIO (PARallel IO) was created over 10 years

ago, on top of IOAPI_3 to provide parallel I/O functionalities

Current I/O design: any processor can perform read but only I/O processor can perform write

Observation

• Read operation overhead• Write operation synchronization cost

Summary

CMAQ degradation comes from read operation as well as synchronization cost for write operation. This implies not “suitable” to run with large number of processors

AQF’s I/O design does show better performance DFIO approach takes care the degradation

problem

Next step

Pick a better configuration to compare aqf and cmaq performance

Determine the actual I/O performance using the real model code

Pnetcdf Multicore architecture

THANK YOU !