ee331-inverterdesign

VTC Logic Symbol

Load resistor

switch

Put a transistor here, what kind of that?

Load resistor

switch

vI below the reference voltage VREF

abruptly

Large change at in Small change at output

Wave form?

VDD

What is the behavior of this circuit?

VDS Output characteristics

Load line

ID

VDS

= VGS

VDS =

Deeper look

?

?

0.82V

1.42V

VI

Problem

Problem

1.42V

Triode region

Need to know ID to find W/L and how?

R=?

SUMARY

t

simple discrete component logic gate

used to introduce the concepts associated with static logic gate design

IC realizations do not use resistive loads

NMOS inverter with resistive load:

resistor would take up far too much area.

Static power dissipation

Resistor with a thickness of 1 m in a silicon region with a resistivity of 0.001 .cm. A 95-k load resistor would require the ratio of L/W to be

Transistor Alternatives to the Load Resistor

Not used

Saturated load inverter

Linear load inverter.

VGS2 = VDS2 = VDD VDS1

VO,max

Keep in mind: VO,max = VG2 VTN2

VG2

VI = VDD

VG2

?

Check assumption

VIH = 1.12V; VOL = 0.38 VGS1 VTN1 > VDS1

Need to update iteratively VTNL and VOL

VDS2 = VDD VDS1 VDS2 = 0

Pinchoff, VDS2 = -VTN2

VDS2 = VDD VDS1 VDS2 = 0

Pinchoff, VDS2 = -VTN2

VI = VGS1

VO= VDS1

switching device is saturated load device is in its linear region

For VI near VIL, VDS of Ms will be large and that of ML will be small

VTNL = -0.5V VIL= 0.9V

Check operating region assumptions:

VGS1 VTN1 = 0.9V - 0.6V = 0.3V < VDS1 = 2.37 M1: Saturation

VGS2 VTN2 = 0V (- 0.5V) = 0.5V > VDS2 = 2.5V - 2.37V M2: Triode

vSB = VDD

vSB = VDD

(1)

(2)

VTNL = -1V; VIL = 0.965V; VO = 2,41V

VTNL = -0.52V; VIL = 0.79V; VO = 2,456V

VTNL = -0.51V; VIL = 0.787V; VO = 2,456V

1. Choose a starting value for VTNL. 2. Calculate the corresponding value of VIL using Eq. (1). 3. Use the values VTNL and VIL to calculate a new estimate of vO using Eq. (2). 4. Use vO to calculate an updated value for VTNL. 5. Repeat steps 2 and 3 until the convergence is achieved.

Initiate with VTNL = -1V

MS in the linear region ML in the saturation region

+

Iterative Update of VIH and vO 1. Choose an initial value of VTNL. 2. Calculate the corresponding values of VO and VIH from Eq. (1) 3. Use the new value of VO and Eq. (2) to improve the estimate of VTNL. 4. Repeat steps 2 and 3 until the process converges.

(1)

(2)

+

VTNL = -1V; VO = 0.52V; VIH = 1,64V

VTNL = -0.858V; VO = 0.447V; VIH = 1,493V

VTNL = -0.875V; VO = 0.456V; VIH = 1,511V

VTNL = -0.873V; VO = 0.455V; VIH = 1,51V

Initiate with VTNL = -1V

MS in the linear region ML in the saturation region

Check operating region assumptions:

MS : VGS VTNS = 1.51V 0.6V = 0.91V > VDSS = VO = 0.46V Linear

ML : VGS VTNL = 0 (-0.873V) < VDSL = VDD - VO = 2.5V -0.46V Saturation

0.33

0.93

depletion-mode NMOS logic was the dominant technology for many years in the design of microprocessors.

large static power dissipation inherent in NMOS logic eventually limited further increases in IC chip density

rapid shift took place to the more complex CMOS technology

Slide Number 1Slide Number 2Slide Number 3Slide Number 4Slide Number 5Slide Number 6Slide Number 7Slide Number 8Slide Number 9Slide Number 10Slide Number 11Slide Number 12Slide Number 13Slide Number 14Slide Number 15Slide Number 16Slide Number 17Slide Number 18Slide Number 19Slide Number 20Slide Number 21Slide Number 22Slide Number 23Slide Number 24Slide Number 25Slide Number 26Slide Number 27Slide Number 28Slide Number 29Slide Number 30Slide Number 31Slide Number 32Slide Number 33Slide Number 34Slide Number 35Slide Number 36Slide Number 37Slide Number 38Slide Number 39Slide Number 40Slide Number 41Slide Number 42Slide Number 43Slide Number 44Slide Number 45Slide Number 46Slide Number 47Slide Number 48Slide Number 49Slide Number 50Slide Number 51Slide Number 52Slide Number 53Slide Number 54Slide Number 55Slide Number 56Slide Number 57Slide Number 58Slide Number 59Slide Number 60Slide Number 61Slide Number 62Slide Number 63Slide Number 64Slide Number 65Slide Number 66Slide Number 67Slide Number 68Slide Number 69Slide Number 70Slide Number 71