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ECE 301 – Digital Electronics
Counters
(Lecture #16)
ECE 301 - Digital Electonics 2
3-bit Counter: State Diagram
000
001
010
011
100
101
110
111
ECE 301 - Digital Electonics 3
Asynchronous Counters
(aka. Ripple Counters)
Counters
ECE 301 - Digital Electonics 4
4-bit (up) Counter Let each bit in the counter be represented by the
output of a flip-flop.
Count A3
A2
A1
A0
0 0 0 0 0
1 0 0 0 1
2 0 0 1 0
3 0 0 1 1
4 0 1 0 0
5 0 1 0 1
6 0 1 1 0
7 0 1 1 1
Count A3
A2
A1
A0
8 1 0 0 0
9 1 0 0 1
10 1 0 1 0
11 1 0 1 1
12 1 1 0 0
13 1 1 0 1
14 1 1 1 0
15 1 1 1 1
0 0 0 0 0
ECE 301 - Digital Electonics 5
4-bit (up) Counter: T Flip-Flops
AsynchronousCounter
Counter does not use a common clock.
ECE 301 - Digital Electonics 6
4-bit (up) Counter: T Flip-Flops
Clock
A 0
A 1
A 2
A 3
Count 0 1 2 3 4 5 6 7 8
ECE 301 - Digital Electonics 7
4-bit (up) Counter: D Flip-Flops
AsynchronousCounter
Counter does not use a common clock.
ECE 301 - Digital Electonics 8
Synchronous Counters
Counters
ECE 301 - Digital Electonics 9
4-bit (up) Counter As before, let each bit in the counter be represented
by the output of a flip-flop.
Count Q3
Q2
Q1
Q0
0 0 0 0 0
1 0 0 0 1
2 0 0 1 0
3 0 0 1 1
4 0 1 0 0
5 0 1 0 1
6 0 1 1 0
7 0 1 1 1
Count Q3
Q2
Q1
Q0
8 1 0 0 0
9 1 0 0 1
10 1 0 1 0
11 1 0 1 1
12 1 1 0 0
13 1 1 0 1
14 1 1 1 0
15 1 1 1 1
0 0 0 0 0
ECE 301 - Digital Electonics 10
4-bit (up) Counter: T Flip-Flops
T Q
Q Clock
T Q
Q
T Q
Q
1 Q 0 Q 1 Q 2
Clock
Q 0
Q 1
Q 2
Count 0 1 2 3 5 9 12 14 0
T Q
Q
Q 3
Q 3
4 6 8 7 10 11 13 15 1
SynchronousCounter
Counter uses a common clock.
ECE 301 - Digital Electonics 11
4-bit (up) Counter: JK Flip-Flops
SynchronousCounter
Counter uses a common clock.
ECE 301 - Digital Electonics 12
4-bit Counter: D Flip-Flops
Clock
Enable D Q
Q
D Q
Q
D Q
Q
D Q
Q
Q0
Q1
Q2
Q3
Outputcarry
How does the XOR gatefunction when the Enablesignal is a logic-1?
ECE 301 - Digital Electonics 13
Binary Counter with Parallel Load
Synchronous Counters
ECE 301 - Digital Electonics 14
EnableD Q
Q
Q 0
D Q
Q
Q 1
D Q
Q
Q 2
D Q
Q
Q 3
D 0
D 1
D 2
D 3
LoadClock
Outputcarry
0 1
0 1
0 1
0 1
4-bit Counter with Parallel Load
Is the Load signalactive-high or active-low?
ECE 301 - Digital Electonics 15
4-bit Counter with Parallel Load
ECE 301 - Digital Electonics 16
Synchronous Counters
Modulo-6 Counter
ECE 301 - Digital Electonics 17
Modulo-6 Counter: D Flip-Flops
0 1 2 3 4 5 0 1
Clock
Count
Q 0
Q 1
Q 2
Enable
Q 0 Q 1
Q 2
D 0 D 1
D 2
LoadClock
1
0
0
0
Clock
3-bit counterwith Parallel Load
Counter resets to zerowhen count reaches six.
ECE 301 - Digital Electonics 18
Modulo-6 Counter: T Flip-Flops
T Q
Q Clock
T Q
Q
T Q
Q
1 Q 0 Q 1 Q 2
Clock
Q 0
Q 1
Q 2
Count 0 1 2 3 4 5 0 1 2
asynchronous clear signal Counter cleared when count reaches six.
ECE 301 - Digital Electonics 19
BCD (Decimal) Counter
(aka. Modulo-10 Counter)
Counters
ECE 301 - Digital Electonics 20
BCD Counter: State Diagram
ECE 301 - Digital Electonics 21
BCD Counter: JK Flip-Flops
AsynchronousCounter
ECE 301 - Digital Electonics 22
BCD Counter: D Flip-Flops
SynchronousCounter
ECE 301 - Digital Electonics 23
Up / Down Counter
Synchronous Counters
ECE 301 - Digital Electonics 24
4-bit Up / Down Counter
ECE 301 - Digital Electonics 25
Acknowledgments
The slides used in this lecture were taken, with permission, from those provided by PUBLISHER for
TEXT BOOK NAME (3rd Edition).
They are the property of and are copyrighted by PUBLISHER.
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