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Differential Pair Transmission Lines2014 IEEE International Symposium on Electromagnetic Compatibility
Differential Pair Transmission Lines Outline:
I. What are Differential Pair Transmission Lines?II. What Makes a Good Differential Pair Transmission Line?III. Demonstration: A Good Differential PairIV. What Makes a Bad Differential Pair Transmission Line?V. Demonstration: Effect of Different Trace LengthVI. Demonstration: Effect of Symmetrical and Asymmetrical StubsVII. Coupling: Tight or Loose?VIII. Demonstration: Symmetrical Loose and Tight couplingIX. EmissionsX. Signal SkewXI. Common‐Mode‐ChokesXII. Demonstration: Common‐Mode‐Choke on PCBXIII. Demonstration: Common‐Mode‐Choke Measurements with FFTXIV. ConclusionsXV. Bibliography
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I. What are Differential Pair Transmission Lines?
Differential Pair Transmission Lines
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A Differential Pair Transmission Line is any two conductive paths used to transfer energy.
Differential Pair Transmission Lines
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• The signals are equal in amplitude but opposite in polarity.
Differential Pair Transmission Lines
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• The majority of the return currents for each line are in the Ground/Power Planes.
Differential Pair Transmission Lines:
• Any signal on a differential pair can be described by a differential‐signal component and a common‐signal component. Each component will see a different impedance as it propagates down the pair.
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Differential Pair Transmission Lines:
• Differential signaling has many signal‐integrity advantages over single‐ended signals, such as:– Contributing to less rail collapse, – Less EMI, – Better noise immunity, and – Less sensitivity to attenuation.
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Differential Pair Transmission Lines:
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II. What Makes a Good Differential Pair Transmission Line?
What Properties make a Good Differential Pair Transmission Line:
• UNIFORM cross section is the most important property.
• MATCHED TIME DELAY (electrical trace length) between each line is the second most important property.
• SYMMETRY the same line width and dielectric spacing
• IMPEDANCE MATCHING of Source, Transmission Line, and Load.
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UNIFORM
SYMMETRY,
IMPEDANCE MATCHING
MATCHED TIME DELAY
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III: Demonstration: A Good Differential Pair
A1
2
A Good Differential Pair:
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Tight Coupled Symmetrical Differential PairNote the well defined differential signals and minimum skew – trademarks of a well designed differential pair.
What is Skew?
• Skew the time delay between two or more nets. It can be controlled … by matching the length of the nets.*
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* Dr. Eric Bogatin: Signal and Power Integrity Simplified, Pages 9 and 533
Common‐Mode Signal generated by skew even with the common signal terminated.
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IV. What Makes a Bad Differential Pair?
What Properties make a Bad Differential Pair Transmission Line:
• Asymmetry:– Between Differential Traces (Test Pads/Stubs/Plane Jumps/vias)– Between Differential Trace Electrical Lengths (Time/Phase Delay)
• Changes in: – Distances between Traces (Impedance Changes)– Changes in Trace Width (Impedance Changes)
• Inconsistent Return Paths:– Breaks in Planes– Layer Jumping
Any asymmetries will convert differential signals into common mode signals
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V. Demonstration of the Effect of Different Trace Lengths:
B1
2
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Skew: Close Traces with Different Trace Lengths vs. Close Traces with Equal Trace Lengths
Close Traces with Different Trace Lengths Close Traces with Equal Trace Length
Note the increase of Skew
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Skew: Far Traces with Different Trace Lengths vs. Close Traces with Different Trace Lengths
Far Traces with Different Trace Lengths
Note the equal increase in amplitude of Skew with change with Close or Far Coupling
Close Traces with Different Trace Lengths
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VI. Demonstration of the Effect of Symmetrical and Asymmetrical Stubs
D1
2
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Skew: Tight Coupling Asymmetrical Stubs vs. Tight Coupled Symmetrical Stubs
Tight Coupled Asymmetrical Stubs Tight Coupled Symmetrical StubsNote that in this instance of lower frequency and rise/fall times, the placement of the stubs has little or no effect. However at higher frequencies, expect to see an affect on the signal and increased skew.
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VII. Coupling: Tight or Loose?
Loose Coupling:
• Loose Coupling provides the opportunity to use wider trace widths to maintain the target impedance.
• Loose Coupling differential impedance depends only on the single‐ended impedance of either trace, not on the spacing (Cross‐Coupling) of the traces.
• Loose Coupling: only equal trace lengths are of importance.
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Tight Coupling:
• More Return Currents Coupled from Trace to Trace
• Reduces unwanted coupling from other traces
• Thinner trace width to maintain the target impedance and increase circuit density
• Greater Effect on Transmission Line Impedance with change of Trace Spacing
• Greater Losses at High Frequency due to Skin Effect
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Differential Pair Transmission Line Impedance, Edge Coupled Stripline
These Fields Determine the Transmission Line Impedance ZO
These Fields Determine the Transmission Line Coupling and Coupling Impedance ZCOUPLING
ZDIFF = 2 x ZODDZODD = ZO ‐ ZCOUPLING
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Mr. Rick Hartley: The Truth about Differential Pairs in High Speed PCBs
Tight Coupling and Transmission Line Impedance(Microstrip Example):
Tight Coupling:Requires Constant Trace‐to‐Trace Spacing to maintain Impedance ZDIFF.Susceptible to a greater change in Trace Impedance with changes in Trace‐to‐Trace spacing.
ZDIFF = 100Ω
4 mil wide line – 6.5 mil separation6 mils above the plane
ZDIFF = 131Ω39.4 milseparation
ZDIFF = 100Ω
7 mil wide line – 14 mil separation6 mils above the plane
ZDIFF = 108Ω 39.4 milseparation
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Mr. Rick Hartley: The Truth about Differential Pairs in High Speed PCBs
Tight Coupling and Skin Effect
4 mil wide traces – 6.5 mil separation6 mils above plane – 100Ω
7 mil wide traces – 14 mil separation6 mils above plane – 100Ω
ZCOUPLING Illustration (24” long traces)
4 mil wide traces – 3.125Gb/S 7 mil wide traces – 3.12Gb/S
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Mr. Rick Hartley: The Truth about Differential Pairs in High Speed PCBs
General Observations on Coupling:
• When loss is important, loosely coupled differential pairs should be used.
• When interconnect density and noise immunity are important, tightly coupled differential pairs should be used.
• With no overriding constraint, loose coupling with a spacing equal to twice the trace width offers a reasonable compromise in providing the lowest loss at the highest interconnect density.
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VIII. Demonstration: Symmetrical Loose vs. Tight Coupling
A1
2
Demonstration: Loose vs. Tight Coupling
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Loose Coupled Symmetrical Tight Coupled Symmetrical
Note no difference in skew or signal
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IX. Emissions
Emissions
• Avoid crossing splits in the return path– PCB artwork– Cable interconnections
• Keep the pairs tightly coupled
• Field containment impacts emissions level– Use of Stripline– Use of tightly coupled Microstrip
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Near Field Emissions H‐Field Scan of Tight vs. Loose Coupling:
Loosely coupled vs. Tightly coupled differential pair
Loosely coupled vs. Tightly coupled differential pair with gap in return path
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X. Signal Skew
Signal Skew
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Signal Skew conclusions
• PCB geometries can ‘fix’ skew issues or make it worse.
• Common Mode Chokes provide improvement
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Signal Integrity Guidelines
• Symmetry matters– Skew
• Physical length and mismatch impact rise/fall time
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XI. Common‐Mode‐Chokes
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So What is a Common‐Mode‐Choke?
• Two Equal Value Inductors wound on the same high‐ Core
• Phased Identically
• With a Mutual Inductance Coupling approaching: 1.00L1
L2
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Advantages:
• Even when the frequencies of signals and noise overlap, their different conduction modes enable suppression of only noise.– Remember:
• Common‐Mode is Noise• Differential‐Mode is Signal
• Performance does not decrease even with a large Differential‐Mode current, as long as the core does not become saturated.
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Common‐Mode Chokes (CMC) come in all different sizes for different current and circuit applications:
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CMC Differential Response: First, Some Assumptions
At frequencies greater than = 5RC2/L2, virtually all the differential currents IGround Plane return to the source through L2 and not through the ground plane.*
RC1 and RC2 (trace and inductor parasitic resistance) can be combined into a single resistor RC which is much less than the Load Resistance RL.
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*Mr. Henry Ott: Electromagnetic Compatibility Engineering, Page 14942
Differential‐Mode Simplification:
VS
L1 L2 2M
RL
RC
L1
L2 RC
RLVS
IS
IS
+ _
(Remember: L1 + L2 ‐ 2LM = LTotal)
And: M = LM
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Final Simplification:
RLRL
RC
VSVS
But: RC << RL
The Inductors Disappear
Loss Resistors can be ignored.
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LET’S PROVE THIS MATHEMATICALLY:
So What? What does this mean?
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Let’s do a little Mathematics describing the Common‐Mode‐Choke’s Differential‐Mode response:*
* Dr. Clayton Paul’s and Mr. Henry Ott’s equations and illustrations
First, we can simplify the circuit diagram:
L2
RL
L1 + L2 – 2M
RL
VS
VS
RC RCK (coupling) 1L1 = L2 = M
L1
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Kirchhoff Voltage Loop:
VS = (L1+L2)IS – 2MIS + (RL + RC) ISIf: k 1 then:ifL1 = L2 = M = L
VS = 2LIS – 2LIS + (RL + RC)ISVS = (RL + RC2)ISifRC << RL
VS = RLIS
All your signal is developed across RL
L1 + L2 ‐ 2M
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(Signal)
VS = RLISSo what does this mean?
The Inductors Disappear from the circuit in the Differential Mode.
L1
L2
RC1
RC2
RLVS VS RL
IS
IS
RC1 and RC2 are << RL; so those losses can be ignored.
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Differential Plot Simulation LTSpice Model
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Overlay of Differential‐Mode Input and Differential‐Mode Output
Note no change in phase or amplitude.
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The CMC Disappears in the Differential Mode
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Mathematics of the Common‐Mode Currents:
Let’s find out how the Common‐Mode currents are attenuated.
The majority of the equations are from Mr. Henry Ott’s: Electromagnetic Compatibility, pages 144 to 155.
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CMC Common Mode Currents for Conducted Emissions:
I1
I2
L1
L2
RLRC
VG
VN = I1RL
VL1
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Current Loop 1
Current Loop 2
(Noise)
Kirchhoff Law for Loop I1 and Loop I2:
• Loop 1:• VG = L1I1 + MI2 + I1RL
• Loop 2:• VG = L2I2 + MI1 + RCI2
• Solving Loop 2 for I2:• I2 = (VG –MI1)/(L2 + R2)
• If: L1 = L2 = M =L
• Substituting I2 into Loop 1:• I1 = (VGRC)/(L(RC + RL) + RCRL)
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Solving For VN:
• I1 = (VGRC)/(L(RC + RL) + RCRL)
• If: RC <<RL
• I1 = (VGRC/((LRL) + RCRL)
• VN = I1RL
• VN = RL(VGRC)/(LRL + RCRL)
• VN = (VGRC)/(L + RC)
• By Multiplying Eq. VN by: (1/L)/(1/L)
• VN = (VGRC/L)/((+RC)/L) (Equation 3-16 page 150)
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As the Common‐Mode Signal’s frequency increases or harmonic content increases, VN (VNoise) decreases due to the j in the denominator.
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Simplifies To
VN = (VGRC/L)/((+RC)/L)
VN = (VGRC)/(+RC)
Typical Common‐Mode Frequency Plot
Effect of thej term: as FrequencyIncreases, VN Decreases
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Common Mode Simulation:
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Note the dramatic change in phase and amplitude.
Black: Common‐Mode InputBlue: Common‐Mode Output
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Now Let’s add together all we’ve learned:
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Simple Circuit Simulation with a Differential and Common‐Mode Voltage Source
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VS(VDifferential-Mode)
VG(VCommon-Mode)
Circuit Input Voltages:
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Red: Differential‐Mode input SignalBlue: Common‐Mode Input SignalBlack: Signal Output Across VRL
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Signal across of RL (VRL)if there is no Magnetic
Coupling between the Two Common‐Mode‐Choke Inductors L1 and L2:
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Precautions:
• In reality, some of the flux produced by the opposing coils leaks and is not cancelled out resulting in a small amount of inductance.
• The differential inductance influence must be considered in applications that use extremely high‐frequency signals.
• Parasitic capacitance influences the differential impedance.
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Parasitic Components, Simple:
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Parasitic Components, Complex:
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Parasitic Component Effects on Differential‐Mode Impedance:
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XII. Demonstration: Common‐Mode‐Choke on PCB
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E1
2
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Skew: Tight Coupled, Symmetrical, Common Mode Choke
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Skew: Tight Coupled, Asymmetrical, Common Mode Choke
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Skew, Tight Coupled, Asymmetrical
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XIII: Demonstration: Common‐Mode‐Choke Measurements with FFT
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Differential Signals: 180° out of Phase, Skew in White
Differential Signal with Common‐Mode‐Choke Differential Signal without Common‐Mode‐Choke
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Common Mode Signals: 0° in Phase, Skew in White
Common Mode Signal with Common‐Mode‐Choke, Skew is 8mV/Division
Common Mode Signal without Common‐Mode‐Choke, Skew is 500mV/Division
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FFT Analysis, Differential Signals: 180° out of Phase
FFT of Output Signal with Common‐Mode‐Choke
FFT of Output Signal withoutCommon‐Mode‐Choke
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FFT Analysis, Common Mode Signals: 0° in Phase
FFT of Output Signal withoutCommon‐Mode‐Choke
FFT of Output Signal withCommon‐Mode‐Choke
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XIV. Conclusions:
Conclusions:Differential Pairs
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• Uniform Cross Section• Matched Time Delay between Traces• Symmetry: symmetry with traces, trace width, impedance,
planes, ….• Continuous Paths for Return Currents• Matched Impedance with Source, Load, and Transmission
Line if the Transmission Line is electrically long• Tight Coupling for Dense Layouts and EMC Control• Loose Coupling for less losses and easier Impedance
Control
Conclusions:Common‐Mode‐Chokes
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• Common‐Mode‐Chokes should not replace good PCB layout techniques.
• Differential Inductance influence must be considered in applications that use extremely high‐frequency signals.
• Parasitic Capacitance influences the differential impedance.
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Questions?
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XIV. Bibliography
Bibliography:
• Bogatin, Eric, Signal and Power Integrity Simplified, 2ndEdition, Prentice Hall Signal Integrity Library, 2010
• Connors, Sam, ‘Differential Signaling is the Opiate of the Masses’, IEEE EMC Society Lecture, 2013
• Hartley, Rick, ‘The Truth about Differential Pairs in High Speed PCBs’, IPC DC – RTP Chapter, PCB Carolina, September 2nd, 2009
• Johnson, Howard, Graham, Martin, High‐Speed Digital Design, A Handbook of Black Magic, Prentice Hall, Inc., 1993
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Bibliography
• Montrose, Mark I., EMC and the Printed Circuit Board, John Wiley & Sons, Inc., 1997
• Ott, Henry W., Electromagnetic Compatibility Engineering, John Wiley & Sons, Inc., 2009
• Paul, Clayton R., Introduction to ElectromagneticCompatibility, 2nd Edition, John Wiley & Sons, Inc., 2006
• http://en.wikipedia.org/wiki/Differential_pair
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