CSCE 932, Spring 2007 Fault Tolerance: Testing and Testable Design

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CSCE 932, Spring 2007Fault Tolerance: Testing

and Testable Design

Course Overview

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About Myself

Professor in CSE/UNL since 1970Teach (among others):

VLSI Testing (932)VLSI Design (434/834) Senior Design (488-489)

Computer Organization (230),

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CLK

L1L2

DTS(2)

Double-Tree ScanVLSI Testing

• Imperfect chip manufacturing• Coverage metrics for high-volume

manufacutring• Complexity of defects and algorithms

My Current Research

Handwriting Recognition• A new general paradigm for

recognizing difficult-to-segment patterns without requiring training

GIS• Conflation: Combining information from

different sources• High-resolution satellite image analysis

of urban images for planning growth, etc.

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Outline

Fault Tolerance Technological Trends Course Topics and Organization

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Fault Tolerance

Ability of a system to function in the event of a failureSources of Failure

Permanent (hard) component failures causing system malfunctionTransient failures due to internal or external causes

Unreliable componentsBuggy softwareRadiation, Noise, Crosstalk...

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Fault Tolerance Methods

Redundancy TechniquesComponent (HW or SW) LevelInformation Level

Frequent Testing and Possible Repair

Online testingOffline testing

This course will focus on fault tolerance through testing of digital components

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Types of Testing

During Design & ManufacturingDesign Verification (Validation)Process CharacterizationSilicon DebugProduction (Go/No-Go)

Beyond ManufacturingAcceptancePower-onField test and repair

We will focus on design & manufacturing testing

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Technological Trends

(See ITRS 2005 for details)

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Trends of Interest to Us

Embedded systems and chip or core multiprocessors (CMPs)Importance of low power in high-volume and high-performance devices and systemsFeature Size Reduction Design productivity and time-to-marketWiring delays dominate gate delays

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Number of Processors Sold by Computing Applications

Desktops and Servers market is relatively flat, Embeddedgrowing quickly. The trend is likely to continue.

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Sales of Microprocessors by Instruction Set Architecture

ARM is a RISC processor commonly used as a core. IA-32 and IA-64are very competitive in desktops and notebooks. “Other” areapplication-specific or custom designs

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IC Types and Requirements Determined by Portable/Consumer

Market

Three major types (as identified by ITRS 2005)

SOCLow-power paramountNeed SOC integration (DSP, MPU, I/O Cores, NoC, etc.)

Analog/Mixed SignalMigrating on-chip for voice processing, A/D sampling, and some RF transceiver functions

MPUSpecialized cores to optimize performance for low-power use.

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Feature Size (From ITRS 2005)

MPU Printed Gate Length nm (Near Term)

MPU Printed Gate Length nm (Long Term)

07 08 09 10 11 12 13

42 38 34 30 27 24 21

14 15 16 17 18 19 20

19 17 15 13 12 11 9

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Typical Production Ramp-Up Curve (ITRS-2005)

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Power-Efficient SOC Requirements (ITRS-2005)

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Design Productivity Trends for Power-Efficient SOCs.

To solve the challenging productivity improvement requirement, ITRS-2005 recommends:

1. Design abstraction level must be raised2. Level of automation in design verification and

implementation must be increased3. Design overhead of reuse must be targeted for reduction

– it is not enough to increase the design reuse.

2005 2010 2016 2020Trend: SOC total logic size

(normalized to 2005) 1.00 3.42 13.77 34.15

Requirement % of reused design 30% 50% 74% 90%

Requirement productivity for new designs (normalized to 2005) 1.00 3.02 10.2 22.1

Requirement productivity of reused designs (normalized to productivity for new designs at 2005) 2.00 6.04 20.4 44.2

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Course Topics and Organization

Background in VLSI Testing (first half of the course – by me)

BasicsFault ModelingCoverage AnalysisTest GenerationDesign for Testability

Current topics (presentations and discussions by all) (second half of the course)Individual Research Projects (second half of the course)