Case Study – Single Chip Front End Module (FEM) …...FEM MMIC for the 28GHz 5G band (27.5 to...

White Paper

Plextek RFI Ltd. The Plextek Building, London Road, Great Chesterford,Saffron Walden, CB10 1NY, UK

T: +44 (0) 1799 533200 E: enquiries@plextekrfi.com W: www.plextekrfi.com

With the roll-out of 5G expected inthe very near future, the researchactivities of the industry’s key playersare now well under way and havereached the point where custom mm-wave components are being specified,designed and evaluated. An essentialcomponent required to enable futuremm-wave 5G systems is the FrontEnd Module (FEM) providing thefinal stages of amplification in atransmitter and the earliest stages ofamplification in a receiver in timedivision duplex (TDD) systems. TheFEM must demonstrate high linearityin transmit mode (Tx) and low NoiseFigure in receive mode (Rx).Furthermore, as mm-wave 5Gsystems are likely to require multipleFEMs to be deployed in each terminalas part of a phased array or switchedantenna beam architecture, theymust also be highly efficient, compactand low cost. Ease of control andmonitoring is also highly desirable insuch applications.

This case study describes the designand evaluation of an SMT packagedFEM MMIC for the 28GHz 5G band(27.5 to 28.35GHz) which satisfies allof the requirements outlined. The partwas developed by Plextek RFI andfabricated on WIN Semiconductor’sPE-15 process which is a 4V, 0.15µm,enhancement mode GaAs P-HEMTprocess. It is conveniently housed in acompact and low-cost 5mm x 5mmplastic overmolded SMT compatibleQFN package. The part can be readilycontrolled and monitored by widelyavailable multi-channel ADC andDAC circuits. It easily covers 27GHzto 29GHz and so encompasses the full28GHz 5G band.

A block diagram of the FEM MMIC isshown above. The transmit signal pathruns from left to right in the top half ofthe diagram; the input is at the pinlabelled ‘PA_RFin’. The signal isamplified by a 3 stage PA and thenrouted to the Antenna via a single poledouble throw (SPDT) switch. A tem-perature compensated power detectoris included to allow monitoring of the

transmitted RF output power. The com-pensated detector output is given by thedifference between the voltages ‘Vref’and ‘Vdet’. A fast switching enablecircuit ‘PA Enable Circuit’ is also fea-tured and is controlled by the (activelow) logic signal ‘PA_ON’. This is usedto rapidly power up and power downthe PA when switching between Tx andRx modes such that it draws a mere0.1mA when not in use, maximizingoverall system efficiency. In theenabled state the PA is biased in deepclass AB for good efficiency at back-off, positive gate bias voltages areapplied at pins ‘PA_Vg12’ and‘PA_Vg3’ of around +0.45V. The PAruns from a +4V drain supply appliedat ‘PA_Vd12’ and ‘PA_Vd3’.

The SPDT switch can be controlled bya single bit, ‘Vctrl1’, which is set to+4V for Tx mode or 0V for Rx mode.Single bit control is facilitated by the‘SPDT Control Circuit’ which is essen-tially a 1 to 2 line decoder. The com-bined supply current drawn by both thecontrol circuit and the SPDT itself isjust 1mA from the +4V applied at‘VD_SW’.

Sheet Code  R

Fi0614

Figure 1: Block Diagram of FEM MMIC for 28GHz 5G

Case Study –Single Chip

Front End Module(FEM) for 28GHz 5G

Plextek RFI Ltd. The Plextek Building, London Road, Great Chesterford,Saffron Walden, CB10 1NY, UK

T: +44 (0) 1799 533200 E: enquiries@plextekrfi.com W: www.plextekrfi.com

+4V. Small signal gain (S21) is 17.1dB±0.4dB from 27GHz to 29GHz. Theinput return loss (S11) is better than18dB across the band. The output ismatched for best PAE at back-off andhas an output return loss (S22) of 8dBor better across the band.

The measured output referred thirdorder intercept point (OIP3) of the Txpath versus frequency is plotted atdifferent wanted output tone powersranging from 1dBm per tone to 11dBmper tone in Figure 5. The tones werespaced 100MHz apart. The OIP3 isaround +28dBm across the 5G bandand shows very little variation withtone power over a 10dB dynamic range.

Figure 6 shows the measured outputpower of the Tx path at the antenna pinagainst frequency. The RF outputpower is around 21dBm at saturationand around 20.2dBm at 1dB compres-sion. The trace labelled ‘Power atIMD3=35dBc’ refers to the total outputpower at which the third order inter-modulation products (IMD3) are 35dBbelow the wanted products during a2-tone test with 100MHz tone spacing.At this point the part is operating ataround 7dB backed-off from P1dB and

tion were key considerations duringthe design process. Die were testedRFOW, which confirmed that the firstpass design had been successful priorto packaging.

A photograph of one of the packagedFEMs mounted on a low-cost laminateevaluation PCB is shown above. ATRL calibration standard was alsofabricated to allow measured perform-ance parameters to be easily referencedto the package’s RF pins.

Evaluation results for the packagedFEM MMIC mounted on the PCB andreferenced to the package’s RF pins areshown overpage. Throughout the eval-uation, a multi-channel DAC and ADCIC was used to control and monitor theFEM. Conveniently, the FEM does notrequire any negative voltages as it wasdesigned on an enhancement modeprocess.

Measured s-parameters of the Tx pathof a typical FEM on the evaluationPCB are shown in Figure 4. In thismode the LNA is powered down, theSPDT control bit ‘Vctrl1’ is toggledhigh and the PA biased to around70mA total quiescent current from

The input to the receive path is at the‘Antenna’ pin, which is routed to theinput of a 2 stage LNA by the SPDT.The output of the receive path is at thepin labelled ‘LNA_RFout’. As with thePA, the LNA also has a fast switchingenable circuit such that the LNA drawsas little as 0.1mA when not in use.When enabled, the LNA requires just10mA of DC supply current from its+4V supply. The gate bias voltage (ofaround +0.55V) is applied at pin‘LNA_Vg’ and the 4V drain bias isapplied at ‘LNA_Vd’. The‘LNA_Vsense’ pin is provided toallow for bias current monitoring.When correctly biased this pin is at3.9V.

A photograph of the FEM die is shownabove.

The FEM MMIC die measures just3.38mm x 1.99mm. Its pad / pin posi-tions are similar to those shown in theblock diagram, although it incorpo-rates a number of GND pads in orderto make it fully RF on Wafer (RFOW)testable. It was designed to be pack-aged in a low-cost plastic overmolded5mm x 5mm QFN and the effects ofthe overmold and the package transi-

Figure 2: Die Photograph of FEM MMIC for 28GHz 5G

Figure 3: Photograph of Packaged FEMon a Laminate Evaluation PCB

Plextek RFI Ltd. The Plextek Building, London Road, Great Chesterford,Saffron Walden, CB10 1NY, UK

T: +44 (0) 1799 533200 E: enquiries@plextekrfi.com W: www.plextekrfi.com

is closer to what would be the normalaverage operating power in a 5Gsystem. An important goal of thedesign process was to maximize theefficiency at this operating point.

The measured power added efficien-cies (PAE), at the antenna pin, at P1dBand at back-off are shown againstfrequency in Figure 7.

PAE at 28GHz and 1dB compressionis slightly greater than 20%. Whenbacked-off to the point at which IMD3reaches 35dBc the part achieves a PAEof 6.5%. This is an excellent result andis largely due to the PA being designedto operate in deep class AB.

The on-chip Tx power detector pro-duces a temperature compensatedoutput voltage ‘Vref-Vdet’. The detec-tor’s voltage is linear with RF outputpower (in dBm) for output powers

from 6dBm to 21dBm (the Psat of thePA).

The Rx path performance is shownnext. In this mode the PA is powereddown, ‘Vctrl1’ is set to 0V and theLNA biased to around 10mA from+4V with 3.9V observed on the‘LNA_Vsense’ pin.

Figure 4: FEM TX Path Small Signal S-Parame-ters

Figure 5: FEM Tx OIP3 Vs Frequency Vs Out-put Tone Power (100MHz tone spacing)

Figure 6: FEM Tx Path Output Power Vs Frequency Figure 7: FEM Tx Path PAE Vs Frequency atP1dB and at Back-Off

Plextek RFI Ltd. The Plextek Building, London Road, Great Chesterford,Saffron Walden, CB10 1NY, UK

T: +44 (0) 1799 533200 E: enquiries@plextekrfi.com W: www.plextekrfi.com

The measured small signal gain andNoise Figure are plotted against fre-quency in Figure 8. Gain is around13.5dB with a flatness of just ±0.3dBacross the band.

The Rx path has an excellent NoiseFigure of typically 3.3dB from 27GHzto 29GHz band.

The Rx path also demonstrates impres-sive linearity for the modest powerconsumption. Key parameters such asP1dB and OIP3 are around 6.2dBmand 21dBm respectively across theband and are plotted in Figure 9.

Figure 8: FEM Rx Noise Figure &Small signal Gain

The FEM MMIC described in thiscase study will potentially play a vitalrole in future 28GHz, 5G systems. Thepart has been shown to address all therequirements for integration into mm-wave phased-array terminals andoffers excellent Tx linearity and effi-ciency together with outstanding RxNoise Figure. The part also features aTx power detector, Tx and Rx enablecircuits, an SPDT decoder circuit andRx bias monitoring. Realised on astate of the art 0.15µm enhancementmode GaAs PHEMT process, the partis extremely easy to control and

Figure 9: FEM Rx P1dB & OIP3

monitor using widely available multi-channel ADC and DAC circuits. Inaddition, the part is convenientlyhoused in a compact and low cost 5mmx 5mm plastic overmolded QFN SMTpackage, making it well suited to highvolume usage.