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This research was developed with funding from the Defense Advanced Research Projects Agency (DARPA).
The views, opinions and/or findings expressed are those of the author and should not be interpreted as representing the official views or policies of the Department of Defense or the U.S. Government.
Distribution Statement A – Approved for Public Release, Distribution Unlimited
Heterogeneous 3D
Progress Towards a 40nm GaN FoundryFlorian Herrault, Andrea Corrion, Daniel Denninghoff, Michael Johnson, Erdem Arkun, Ignacio Ramos, Joel Wong, Shawn Burnham, Ara Kurdoghlian, David Chow – HRL Laboratories, LLC
mm-wave GaN Maturation Program (MGM)
Background Results and ImpactApproach
The DARPA MTO NEXT Program established
the world’s fastest GaN technology at HRL
Cycle time improvement of
HRL T3 GaN
T3 GaN
Today
T3 GaN
Phase 1
MECAMIC
Phase 1
Cycle
Tim
e R
ela
tive t
o T
3 G
aN
Today
Back-end-of-line
Front-end-of-line
100%
60%
19%
HRL’s GaN T3 and T4A device technologies
enable unprecedented millimeter-wave
phased-array radar power and efficiency
MGM Program: 1) Process maturation to
enhance production readiness 2) provide
external access to HRL technology, and 3)
develop novel manufacturing techniques with
unprecedented low cycle time & cost
• Decrease T3 cycle time by 40%
through re-engineering process
flow to alleviate bottlenecks and
redundancies & equipment
acquisition
• Physics-of-failure & targeted
experimentation to increase T3
fabrication yield by 50%
• Develop novel manufacturing
approach (Metal-Embedded
Copper Chip Assembly
Microwave ICs = MECAMIC) for
unprecedented short cycle time
• Advance Manufacturing
Readiness Level (MRL) to 6
• T3 Ka-band MMIC: >4 Watts, >40% efficiency
• T4A W-band MMIC: >0.5 Watts, >35% efficiency
Optimization of critical processing steps with
decreased cycle time
SiC etcher acquisition
Robust 40-nm gate process
Process Design Kit (PDK) improvements, high-
power Ka-band & W-band amplifiers, MPW
Foundry runs available to external customers,
Metal-Embedded Chip Assembly for Microwave
Integrated Circuits (MECAMIC) for potential
unprecedented short cycle time
All images author’s own
At Ka-band
Process HRL T2 HRL T3 HRL T4a
Key Feature BaselineVertical & Lateral
Scaling
Asymmetric Self-
Aligned Gate,
3D n+ Contact
Gate Length 150 nm 40 nm 20 nm
fT/fMAX 90/220 GHz 200/400 GHz 320/550 GHz
Breakdown >40 V >40 V 17 V
New data
(MGM)
Application Pull & Circuit DemonstrationsAll images author’s own
Author’s own mage
Author’s own
image
Author’s own image
T4A 58% PAE, 0.25 W Pout
3-5 Watts at
Ka-band
0.5-1 Watt at
W-band
T3 GaN device chiplets for
heterogeneous integration of
RF ICs
Ka-band
On-going improvements:
increase in Ka-band
efficiency & power
• Perform Multi-Project-Wafer (MPW) foundry runs for external designers
MECAMIC Heterogeneous Integration
RF in
RF out
MECAMIC
Interconnect
Goal – Achieve high power & high efficiency
at mm-wave to enabling high-power arrays
& with reduced cooling
Tape-out access available
to external customers
through MPW model
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