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Real-Time MIMO Discrete Multitone Transceiver Testbed
Alex G. Olson, Aditya Chopra, Yousof Mortazavi, Ian C. Wong, and Brian L. Evans
Embedded Signal Processing LaboratoryThe University of Texas at Austin
IntroductionProblem Statement:
Single-channel wireline communications systems may not provide sufficient data rates for future telemetry applications
There is an upper limit to the communication bit rates depending on certain parameters :
Modulation and coding schemes Transmit Energy Receiver noise floor Transmission Bandwidth
Proposed SolutionUse multiple transceivers operating in parallel on different wires
Discrete Multitone ModulationDMT is a commonly used modulation scheme in wireline communication systems (eg. DSL)The Idea:
Divide frequency selective channel into many narrowband subchannelsData is transmitted over each frequency flat subchannelFFT (Fast Fourier Transform) is used for modulation/demodulation
MIMO DMT TestbedDesign Goal: Create a 2x2 DMT hardware testbed
Enables rapid prototyping/testing of new designs Provides user with complete control over system parameters Relatively unconstrained by resource and real-time issues Can be connected to different cable designs Allow visualization of the channel parameters and various communication performance
metrics
Benefits of Hardware TestbedConfigurable – User can choose system parameters and signal processing blocksAllows evaluation of the communication performance and computational
complexity tradeoffsCable modelling not required
Design ChallengesReal-time constraints on the transmitter and receiver systemAnalog front-end
MIMO DMT System Model
NEXT: Near End CrosstalkPortion of the transmitted signal that leaks onto the local
receiver FEXT: Far End Crosstalk
Portion of the transmitted signal that leaks onto the remote receiver
MIMO DMT System Model
Visualization and control
•Allow user to select system parameters•Display channel measurements and communication performance metrics•No real-time requirements
Transceiver
•Embedded PC running MIMO DMT communication system•Real-time requirements•D/A and A/D converters
Transmission Medium
•1000ft CAT-5e cable used as communication medium•Pairs of wires in the cable inter-twisted for maximum crosstalk•Measured FEXT ~ 10dB below signal level
Front-End•Hybrid circuits used for echo cancellation and as line drivers•Low-Pass filters to remove aliasing effects
Modem Implementation- Hardware
TX0 TX1 RX0 RX1Embedded
PCPXI-8186
PXI Backplane - PXI-1045
LPF
H
LPF
H
LPF
H
LPF
H
PXI-5421 A/D PXI-5122 D/A
TCP Link
LPF : Low Pass FilterH: Hybrid
Modem Implementation- SoftwareReal-Time Target
Baseband processing - C++ Dynamic Link Library (DLL)Generates/processes samples sent/received to/from NI
hardwareLabVIEW VIs
Accesses hardware and calls DLL functionsReal Time OS – ETOS is running on target to ensure
reatime performance
Desktop PCConnects to real-time target via TCP/IP linkVisualization and control using LabVIEW
Bit AllocationFixed amount of energy available to transmit per DMT symbolDMT allows different number of bits transmitted on each toneBit Allocation can be adjusted to maximize throughput or the SNR
margin on each toneHughes Hartog Bit Allocation algorithm [D. Hughes-Hartog,1987]
implemented in the testbed
Unifom Gain Bit Allocation•Equal Power is allocated across all tones•Sub-optimal for frequency selective channels
Hughes Hartog Algorithm
•Greedy algorithm•One bit is added to the tone which requires least amount of energy
Uniform Power
Hughes-Hartog
0 0.2 0.4 0.6 0.8 1 1.2 1.4
Computational Complexity of Bit Allocation Algorithms
Execution Time in ms
FEXT CancellationFar End Crosstalk provides significant amount of deterioration to the
bit rateUsing vectored DMT [Ginis and Cioffi,2002] the multiple receivers
are assumed to operate together to cancel crosstalkCrosstalk can be cancelled through linear and non linear receivers
The Zero Forcing equalizer is an example of a linear receiver with crosstalk cancellation
Successive Interference Cancellation is a non linear crosstalk cancellation receiver
Slicer
Vectored DMT
11
QHYSuccessive
InterferenceCancellation
Estimate channelmatrix H
H = Q R
Training (per-tone)
• Uses channel estimate and both received signals to effectively cancel crosstalk
y0
y1
For each tone, “H”, “Q” and “R” are 2x2 matrices
Q RSymbol decoding
(per-tone)
Experimental Results• System Parameters
• 256 tones per DMT symbol• Maximum Transmitted Voltage 5.0V• Receiver noise floor ~ -60dB
• 1000ft CAT-5 cable
• Inter-twisted pairs for maximum FEXT
• FEXT limits SNR to ~10dB
Experimental Results
ConclusionsFEXT (crosstalk) can be effectively cancelled with
Vectored DMT
Experimental tests show that a 2x2 Vectored DMT system achieves 1.99x data rate (~4Mbps) over single-channel DMT
Vectored DMT is practical and has low implementation cost (for 2x2 MIMO systems)
Hughes-Hartog bit loading (fine gains) can provide ~100Kbps data rate improvement over uniform gain
D. Hughes-Hartog, ”Ensemble modem structure for imperfect transmission media.” U.S. Patents Nos. 4,679,227 (July 1987), 4,731,816 (March 1988), and 4,833,706 (May 1989)
G. Ginis and J. Cioffi, “Vectored transmission for digital subscriber line systems,” IEEE J. Select. Areas Commun., vol. 20, no. 5, pp. 1085-1104, Jun. 2002
Hardware• National Instruments
– PXI Chassis– Embedded Computer– A/D and D/A boards– LabVIEW Real-Time
• Hardware + LabVIEW Real-Time form a 2x2 MIMO DMT modem
$25,000Total
$5,500PXI-5122114-Bit 100 MS/s Digitizer
$5,500PXI-5421216-Bit 100 MS/s AWG
$4,000PXI-81861Embedded Controller
$5,000PXI-10451PXI Chassis
Unit PricePart #Qty.Description
Equipment required for a uni-directional system:
Analog Front-End
• Hybrid circuits from Texas Instruments– 4 x $50– Line Driver / “2-wire to 4-
wire” Interface
• Custom passive analog filters from TTE– 4x $275– Serve as anti-aliasing
filters for TX and RX
Modem Implementation
Embedded
PCTX 0 TX 1 RX 0 RX 1
DigitizerARB ARB
LPF
H
LPF
H
LPF
H
LPF
HARB: Arbitrary Waveform Generator
[Digital to Analog Converter]
Digitizer: [Analog to Digital Converter]
LPF: Low pass filter (anti-aliasing filter)
TC
P
PXI Chassis
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