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05/03/23 Department of Information Technology
1
Stacks and Queues
CS1251Computer Organization
Carl Hamacher
05/03/23 Department of Information Technology 2
Stack
Data Structure Last-In-First-Out Pushdown
Register Stack Pointer (SP)
Operations Push Pop
first word
top element
last word
0
SP
2k-1
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BOTTOM
Memory
Stack
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Stack Operations
Push Add new item to top of stack SP decremented before move
Pop Remove item from top of stack SP incremented after move
ADD #-1,SPMOVE ITEM,(SP)
MOVE (SP),ITEMADD #1,SP
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Other Addressing Modes
Autodecrement (Push) Register Indirect Contents of register automatically
decremented before accessing the operand
Autoincrement (Pop) Register Indirect Contents of register automatically
incremented after accessing the operand
MOVE ITEM,-(SP)
MOVE (SP)+,ITEM
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Stack Overflow
Check for stack limits before push and pop
Compare src,dst [dst] - [src] Condition Codes
SAFEPUSH COMPARE TOP,SP BLEZ FULLERROR MOVE ITEM,-(SP)
SAFEPOP COMPARE BOTTOM,SP BGTZ EMPTYERROR MOVE (SP)+,ITEM
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Queue
Data Structure First-In-First-Out
Two Pointers IN OUT
Operations Append Remove
first word
last word
0
OUT
2k-1
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Memory
Queue
IN
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Subroutines
Reusable subtask Operations
CallStore contents of the PC in the LINK registerBranch to the target address
ReturnBranch to the address contained in the LINK register
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Nesting Subroutines
Subsequent subroutine calls destroy return address in LINK register
Last subroutine returns to subroutine that called it Retrun address are last-in-first-out
Use Processor Stack to store return addresses Call pushes PC onto stack Return pops return address off stack into PC
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Parameter Passing
Program passes parameters to subroutine Subroutine returns parameters to calling
program Passing Methods
Memory Registers Processor Stack
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Parameter Passing via Registers
Calling Program
MOVE N,R1 MOVE #NUM1,R2 CALL LISTADD MOVE R0,SUM
Subroutine
LISTADD CLEAR R0LOOP ADD (R2)+,R0 DEC R1 BGTZ LOOP RETURN
SUM
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N
NUM1
NUMn
n
R0
R1
R2
R3
n Counter
NUM1 Pointer
0 Accumulator
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Parameter Passing via Stack MOVE #NUM1,-(SP) MOVE N,-(SP) CALL LISTADD MOVE 1(SP),SUM ADD #2,SP
LISTADD MvMult R0-R2,-(SP) MOVE 4(SP),R1 MOVE 5(SP),R2 CLEAR R0LOOP ADD (R2)+,R0 DEC R1 BGTZ LOOP MOVE R0,5(SP) MvMult (SP)+,R0-R2 RETURN
[R0]
NUM1 / SUM
Return address
n
[R1]
[R2]
Level 1
Level 3
Level 4
Level 2
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Stack Frame
Private workspace for subroutine Created at subroutine call Contains parameters and local variables Freed up when subroutine returns
Frame Pointer (FP) General purpose register Fixed during subroutine execution Provides easy access to parameters and variables
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Example Processor: ARM
Advanced RISC Machines (ARM) Limited http://www.arm.com/
ARM Powered Products PlayStation Portable Nintendo DS iPod
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Register Structure
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.
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31 0
R0
R1
R14
(PC) R15
Status Register N Z C V . . .
Program Counter
GeneralPurposeRegisters
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Instruction Format
Assembly Language OPcode Rd,Rn,Rm
ADD R0,R2,R4
RTN
R0 [R2] + [R4]
Condition OP code Rn Rd Other info Rm
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Instruction Set
See Appendix B
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Addressing Modes
Name Syntax Addressing Function
Immediate #Value Operand = Value
Register Ri EA = Ri
Absolute (Direct) LOC EA = LOC
Pre-indexed, with Immediate offset
[Rn,#offset] EA = [Rn] + offset
Post-indexed, with Immediate offset
[Rn],#offset EA = [Rn];Rn [Rn] + offset
Relative Location EA = Location = [PC] + offset
EA = Effective Address
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Program for Adding Numbers
LDR R1,N LDR R2,POINTER MOV R0,#0LOOP LDR R3,[R2],#4 ADD R0,R0,R3 SUBS R1,R1,#1 BGT LOOP STR R0,SUM
SUM
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N
NUM1
NUMn
n
R0
R1
R2
R3
n Counter
NUM1 Pointer
0 Accumulator
Next Number
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Performance Equation
Processor Execution Time (T) Number of Machine Language Instructions (N) Average Steps per Machine Instruction (S) Clock Rate (R)
T N SR
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CISC vs RISC
Complex Instruction Set Computers (CISC) Smaller N Larger S
Reduced Instruction Set Computers (RISC) Larger N Smaller S Easier to Pipeline
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Questions?
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