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EMC Design and Interconnection Techniques
Cable routing and connection
Recommendations of IEC 61000‐5‐2:1997 and many other recent standards concerned with the installation of information technology and telecommunications cables:
a) All buildings to have a lightning protection system, bonded at ground level at least to their internal bonding network. All building steel, metalwork, cable ducts, conduits, equipment chassis, and earthing conductors in a building to be cross‐bonded to create a 3‐dimensional bonding network with mesh size no greater than 4 metres.
b) Segregate power and signal cables into at least four "classes", from very sensitive to very noisy.
c) Run all cables along a single route between items of equipment (which should therefore have a single connection panel each), whilst preserving at least minimum specified spacings between cable classes.
d) 360o Bond cable screens (and any armouring) to the equipment enclosure shields at both ends (see later) unless specifically prohibited by the manufacturer of the (proven EMC compliant) transducer or equipment.
e) Prevent excessive screen currents by routing all cables (signal and power) very close to conductors or metalwork forming part of the meshed earth network.
f) Where meshed building earth is not available, use cable trays, ducts, conduits, or if these don't exist a heavy gauge earth conductor, as a Parallel Earth Conductor (PEC). A PEC must be bonded at both ends to the equipment chassis earths and the signal cable strapped to it along its entire length.
The needs for segregation, PECs, and (in general) screen bonding at both ends will have an impact on the design of interconnections panel layout, choice of connector types, and the provision of some means for bonding heavy‐duty PECs.
Figure 2E gives an overview of the techniques involved in connecting screened enclosures together with both screened and unscreened cables.
For short connections between items of equipment such as a PC and its VDU, dedicated printer, and modem, only d) above (360o cable screen bonding to enclosure shields at both ends) is needed ‐ providing all the interconnected items are powered from the same short section of ring main, and all long cables to other parts of the building (e.g. network cables) are galvanically isolated (e.g. Ethernet). These screen bonding techniques are also needed for the EMC domestic hi‐fi and home theatre systems. However, a) often comes in handy as well for protecting such equipment from damage during a thunderstorm.
2.6 Getting the best from cables
Open any signal cable manufacturer's catalogue and you will find a huge variety of cable types, even for similar tasks. This is a warning that cables are all imperfect. The best cable for a given application will be difficult to select, and then will probably be too expensive, too bulky, too stiff, and only available to special order on 26 week leadtime in 5km reels.
2.6.1 Transmission lines
Transmission line techniques prevent cables from acting as resonant antennas.
When the send and return conductors of a signal current loop are physically close together and so enjoy strong mutual coupling, the combination of their mutual capacitance and
inductance results in a characterist ic impedance Z0 = , where L and C are the capacitance and inductance per unit length (a fraction of the A of the highest frequency of concern). Z0 can be calculated for cables and connectors
When Z0 is kept constant over the entire length of an interconnection, and when drive and/or send (source or load) impedances are "matched" to Z0, a controlled‐impedance transmission line is created and resonant effects do not happen. The intrinsic inductance and capacitance of the conductors also create far fewer problems. This is why RF and all EMC test equipment use 50Q transmission line cables and connectors (see Figure 2F), and why high‐speed and/or long distance data busses and serial communications also use transmission lines (usually in the range 50 to 120Q).
Lines must be matched, and the classical method is to match at both source and load. This provides maximum power transfer from source to load, but as it results in a 50% voltage loss for each interconnection, it is often not used for normal signal interconnections in non‐RF equipment. Instead, transmission lines are often terminated at just one end, so as not to lose voltage, even though this is not ideal from either an EMC or signal integrity point of view. Terminating at one end only is a conscious decision to compromise on the engineering to save cost. Figures 2G, H, and J show the main termination methods.
But nothing is perfect and even though not resonant, even the best practical transmission lines still leak a bit. Installation also reduces transmission line performance by causing variations in Z0 (increasing leakage) when cables are bent sharply, crushed, strapped or clipped too tightly, repeatedly flexed, damaged, or fitted with inadequate connectors.
Unfortunately, the overall cost of creating transmission line cable interconnections with high enough quality at modern high frequencies can be very high. Flexible cables for microwave test equipment, for instance, can cost hundreds of pounds per metre. This is why, for GHz Ethernet to run on low‐cost Cat 5 UTP (unscreened twisted pair), it has to use sophisticated DSP algorithms to reduce data rate and spread it randomly, and it still needs four pairs. So although transmission lines are very powerful, they are not a universal panacea for cable problems at high frequencies.
2.6.2 EMC considerations for conductors used inside and outside products
Inside a product ‐ if the product's enclosure shields, and the screening and filtering of its external cables is good enough, almost any type of wire or cable can be used, although signal integrity will suffer. The problem here is that for high‐performance digital or analogue electronics the cost of the enclosure shielding and filtering required can be so high that it would have been cheaper to use more expensive internal cables.
It is generally most cost‐effective to avoid al l internal cables, keeping all non‐optical‐fibre signals in the tracks of plugged‐together PCBs (preferably a single PCB, even using flexi‐rigid types). To make this work the PCBs need to be designed according to the Part 5 of this series, using a ground plane under all tracks. This generally reduces the cost of enclosure shielding and filtering to give the most cost‐effective product, and because it also improves signal integrity it usually saves a couple of development iterations too.
Outside a product ‐ unscreened cables with single‐ended signals are now a serious liability whether the product is digital or analogue. Filtering digital signals does not help much to reduce emissions: single‐ended drive produces copious common‐mode currents at the signal frequencies themselves, causing the product to fail conducted or radiated emissions tests depending on signal frequency. Any filtering would need to remove the signal, which does not help.
Filtering can work quite effectively for low‐frequency analogue signals, but for precision beyond ±0.05% (12 bits) the cost of the filter and its board area increases rapidly. Of course filters have difficulty
removing in‐band interference (such as powerline hum) that a properly designed balanced communication system would easily reject.
2.6.3 Pairing send and return conductors
Even when not using transmission lines, always use paired conductors. Provide a dedicated return path for the return current as close as possible to the send path (and not via an earth or a screen). This works even when signals are single‐ended and all their return conductors are bonded to a common reference potential. The fluxcompensation effect encourages return currents to flow in the path nearest to the send conductor, in preference to alternative current paths, and we can use this natural phenomenon to help keep the field patterns of our cables tight and reduce their E and M leakages. Figure 2K shows the general principle, which is of universal application.
Figure 2K Routing of the conductors in a cable (this example is of switched circuits, but the principle is universally applicable)
It is bad practice to run the return path differently from send path ‐ always use paired send and return conductors which are physically close
Figure 2K shows a mains supply with a switch in one line, but the same principle applies to signals.
The closeness of the send and return conductors over the entire current loop is absolutely crucial at the highest frequencies for circuits to work at all, never mind good EMC.
Ribbon cables carrying a number of single‐ended (i.e. 0V referenced) signals are very poor indeed for EMC and signal integrity, but screening them results in stiff, bulky, expensive cable assemblies which is what flat cables were supposed to avoid.
Using the pairing technique for flat cables improves their EMC considerably and this conductor arrangement is the best:
return, signal, return, signal, return, etc.
A less effective alternative which is often recommended is:
return, signal, signal, return, signal, signal, return, etc.
Significant improvements can often be made by fitting flat cable ferrite clamps (common‐mode chokes) at the source end(s), so that the conductor pairs behave as if they were driven from a balanced source at high frequencies, although proper balanced drive/receive circuits are better (see Part 1 of this series).
Twisted pairs are very much better than parallel pairs. Use twisted triples, quads, etc. where this is what it takes to get all the send and return paths of a signal in close proximity.
Twisted send and return conductors are strongly recommended for power cables: combining all phase and neutral conductors (two for single‐phase, three for three‐phase, four for three‐phase plus neutral) in a single cable with a slow twist greatly reduces the emissions of powerline M field emissions. M fields from power busbars or individually routed phase and neutral cables can render whole areas of buildings unfit for CRT‐based VDU monitors.
Twisted pairs using balanced circuitry (see Part 1 of this series) and common‐mode chokes can be good for signals up to some tens of MHz, depending on the "balance" of the circuit, cable, and connectors. Any unbalance will convert some of the wanted signal into useless common‐mode currents, which all leaks away as fields. Just a few micro‐amps of common‐mode can fail an emissions test. Tighter and more precisely regular twists make cables better for higher frequencies.
A great many types of twisted‐pair cables are available, some intended for transmission lines (Z0 will be specified). But twisted pair technology does not suit mass‐termination. So‐called "twist + flat" flat cable has multiple twisted pairs all formed into a ribbon, but has regular lengths of 100mm or so of parallel conductors for mass‐terminating connectors ‐ and the flat bits are so long they compromise EMC.
2.6.4 Getting the best from screened cables: the screen
There is no such thing as a cable that "complies with the EMC Directive", there are only cables with frequency‐dependant screening performance.
Cable screens must cover the entire route with 360o coverage. Making screening work effectively with low‐cost these days is increasingly difficult, except for the least aggressive and least sensitive signals.
I t i s no longer best practice to use the shield of a cable as the signal return. The problem with co‐axial cables is that the screen carries currents for both the signal return and external interference, and they use the skin effect to keep them on different sides of the screen (known as "tri‐axial mode"). This works fine for solid copper screens (plumbing, to you and me), but flexible screened cables aren't very good at keeping the two currents apart, so return currents leak out, and interfering currents leak in.
But (I hear you say) all RF test equipment uses flexible co‐ax, so it must be OK. Look carefully at these cables next time you are in an EMC test lab: the cables used for higher frequencies are very thick, stiff, and expensive, partly because they are double‐screened at least. They use expensive screwed connectors (e.g. N‐types), and are always used in matched (at both ends) 50Q transmission lines. They are also treated reverentially and woe betide you if you tread on one. At higher frequencies than the average EMC test lab, semirigid or rigid co‐axial cables have to be used, as stiff as automotive brake pipes.
The ability of a screened cable to prevent interference is measured in two ways, as shielding effectiveness (SE), and also as ZT. SE seems obvious enough, and ZT is simply the ratio of the voltage which appears on the centre conductor in response to an external RF current injected into the screen. For a high SE at a given frequency, we need a low ZT. A flat ZT of a few milliQ over the whole frequency range would be ideal.
A very broad‐brush summary of the screening qualities of typical types of screened cables follows, but remember that within each broad category there are many different makes and grades with different performances:
• Spiral wrapped foil is not terribly good at any frequency, and gets progressively worse > 1MHz.
• Longitudinal foil wrap is better than spiral foil.
• Single braid is better than foil at all frequencies, but still gets progressively worse > 10MHz.
• Braid over foil, double braid, or triple braid, are all better than single braid and all start to get progressively worse >100MHz
• Two or more insulated screens are better still, but only up to about 10MHz, at higher frequencies resonances between the screens can reduce their effectiveness to that of just one screen at some frequencies.
• Solid copper screens (e.g. semi‐rigid, rigid, plumbing) are better than braid types and their screening performance continual ly improves at higher frequencies, unlike braid or foil, which always degrades above some frequency. Round metal conduit can be used to add a superb high‐frequency performance screen. (Armouring is also useful as a screen but only at low frequencies, say up to a few MHz.)
• "Superscreened" cables use braid screens with a MuMetal or similar high‐permeability wrap. These can be as good or even better than a solid copper screen, whilst still retaining some flexibility, but are expensive and suit applications where performance is more important than price (e.g. aerospace, military).
• I'm only aware of one manufacturer (Eupen) offering ferrite‐loaded screened cables, which may offer improved high‐frequency performance with good flexibility without the high cost of superscreened cables.
To reduce the bulk and cost of our screened cables and still get good EMC for highperformance modern products we need to use paired conductors for every signal and its return, preferably twisted pairs, just as described above for unscreened cables. Balanced drive/receive is also a great help.
2.6.5 Getting the best from screened cables: terminating the screen
Using co‐axial cables and connecting their screens to a circuit 0V track is almost a guarantee of EMC disaster for high‐performance digital and analogue products, for both emissions and immunity. Insulated BNC connectors on a product are usually a sign that all may not be well for EMC.
Cable screens should always be connected to their enclosure shield (even if they then go on to connect to circuit 0V), unless there are very good quantitative engineering and EMC reasons why not. "We've always done it this way" is not a reason.
Circuit development benches need to create the real structure of the product and the real interconnections with the outside world as closely as possible. Otherwise circuit designers may use various interconnection tricks to make their PCBs test well on the bench (I know, I used to do it too) ‐ leaving it to someone else to sort out the resulting real‐life application and EMC problems.
But even a high‐quality screened cable is no good if the connection of the screen to the product is deficient. Cable screens need to be terminated in 360o ‐ a complete circumferential connection to the skin of the screened enclosure they are penetrating, so the connectors used are very important.
"Pigtails" should never be used, except where the screen is only needed up to a couple of MHz. Where pigtails are used they must be kept as short as assembly techniques allow, and splitting a pigtail into two on opposite sides also helps a bit. In the mid 1980's a company replaced all their pigtailed chassis‐mount BNCs with crimped types for EMC reasons. Although the crimping tool cost around £600 they were surprised to find they quickly saved money because crimping was quicker and suffered fewer rejects. So pigtailing may be uneconomic as well as poor for EMC.
The "black magic" of cable screening is to understand that a cable's SE is compromised if its connectors, or the enclosure shields it is connected to, have a lower SE.
It is possible to use screened cables successfully with some unshielded products, if they use no internal wires and their PCBs are completely ground‐planed with low‐profile components. This is because the PCB ground plane, like any metal sheet, creates a zone of reduced field strength ‐ a volumetric shield for a limited range of frequencies. Successful use of this technique depends upon the electronic technology in the product, and is unlikely to be adequate for high‐performance digital or analogue products. The cable screens would connect 360o to the PCB ground plane.
2.6.6 Terminating cable screens at both ends
This seems like heresy to some, but with the high frequencies in use these days leaving an end unterminated will usually leak too much. Screen termination at both ends also allows the screen to work on all orientations of magnetic fields.
Of course, connecting screens at both ends allows any earth potential differences to drive currents in the screen that might cause hum pickup, and even melt the cables. Where such earth currents exist it is an indication of poor facility earth‐bonding which could allow earth faults or thunderstorm surges to destroy inadequately protected electronics. It is not unknown for screened cables to flash‐over at unterminated ends during thunderstorms, creating obvious hazards.
It is sometimes recommended to electrically bond a cable screen at one end, and terminate the other with a small capacitor. The aim is to prevent excessive power frequency screen currents, and it does work to some extent although it is difficult to get capacitors to provide low enough inductance for very high frequencies and it does nothing for surge and flashover problems. Insulated BNC connectors are available with screen‐to‐chassis capacitors built‐in, but the last price I had for types which worked well to 1GHz was nearly £20 each.
Galvanically isolated communications offer a way out of bonding screens at both ends, but such an approach needs careful attention to detail, especially the safety and reliability issues associated with installation earth‐faults and surges. Metal‐free fibre optics are the best kind of galvanically‐isolated signal communications, and the easiest to use.
Section 2.5 above briefly lists the currently accepted best installation practices in achieving good EMC (e.g. using a PEC to divert heavy earth currents) without suffering hot cables and without compromising safety. Refer to IEC 61000‐5‐2:1997 for more detail.
2.7 Getting the best from connectors
Connectors suffer from many of the same EMC problems as cables, after all, they are just short lengths of conductor in a rigid body.
It is best to segregate connectors into those used for internal connections, and those used for outside connections, because of the possibility of flashover from outside to inside pins during surge or electrostatic discharge events. Such flashovers can bypass protective devices.
2.7.1 Unscreened connectors
Controlled‐impedance transmission‐line connectors are increasingly available for high‐speed backplanes or cables.
When not using transmission lines, much improved EMC and signal integrity can be had from ordinary multiway connectors (e.g. DIN41612, screw‐terminal strips) by making sure that each "send" pin has a return pin alongside. At the very least provide one return pin for every two signals. It is best when these are used with balanced signals, but the technique also helps when signals are single‐ended.
2.7.2 Connectors between PCBs
Connectors between PCBs (e.g. daughterboard to motherboard) also benefit greatly from multiple 0V pins spread over their full length and width, and a similar arrangement of power pins also helps significantly. Optimum signal integrity and EMC is generally achieved (for signals sharing the same power rails) with a pin pattern that goes:
The following pattern provides lower performance but is often adequate, and uses fewer pins:
It is also best to extend the connector over the full length of the common edge between the two boards, and liberally sprinkle 0V and power connections over the full length. There is some evidence that random pin allocations may provide better performance by breaking up standing wave patterns. Additional grounds between sensitive and noisy signals can help be a barrier to crosstalk.
We don't really like connectors on PCBs, and they should be avoided if possible (reliability will improve as a result) ‐ as mentioned earlier, single or flexi‐rigid PCBs with ground planes under all their tracks are better. Also: don't socket ICs (use field programmable PROMS). Each IC socket pin is a little antenna positioned right at the most vulnerable or noisy location possible.
2.7.3 Screened connectors
There is no such thing as a connector that "complies with the EMC Directive", there are only connectors with frequency‐dependant screening performance. Screened cables must maintain 360o screen coverage over their whole length, including the backshells of their connectors at both ends. Connector backshells must make 360o electrical bonds to the enclosure shields they are mounted on, using iris springs or some other method. Saddle‐clamps seem to make adequate screen bonds for most purposes in rectangular connector backshells, but avoid the ones that need the screen to made into a pigtail, however short. Figure 2L shows a typical D‐type screen termination.
Co‐axial and twinaxial screened cables benefit most from connectors with screwed metal backshells. These are better and more reliable at high frequencies than bayonet types (like BNC), which is why they are used on satellite TV convertor boxes.
Multiway screened cables are also best used with round connectors with screwed backshells, but are often specified with rectangular connectors such as D‐types or larger. Making a 360o connection from cable screen to connector backshell, and from backshell to enclosure shield, seems a lot to ask of some connector manufacturers, so check this has been done effectively before committing to a particular make or type. Especially watch out for single (or long) springs, clips, and wires, when used to make a screen bond: these are just pigtails and will limit SE at high frequencies.
Unfortunately, many industry‐standard connectors do not allow correct termination of cable shields (e.g. jack plugs, XLRs, phonos, and any number of proprietary connector models). Also unfortunately, connector systems are still being designed without adequate thought being given to the need for simple 360o cable screen termination (e.g. RJ45, USB). The overall SE of a connector will be compromised if used with an enclosure shield or cable with a lower SE.
Figure 2M shows some of the important considerations when bonding connectors to shielded enclosures.
COMPONENT ASSEMBLY TECHNIQUES Component Selection: Resistor Types – Carbon Composition, Film type and Wire Wound
Film type has more inductance that carbon resistors Resonance due to Inductance and Capacitance is the limiting factor for the use of a
resistor at HF Capacitor Types – Ceramic, Tantalum, Mica, Mylar, etc..
Electrolytic capacitors have large series resistance above 25 KHz Mica or Ceramic is Preferred for HF At VHF Feed Through Capacitor is used
Inductor
Air Core Inductor act as a source of Radiated Emission Magnetic Core can pick more EMI Thus Crystal Oscilator replace Inductors in PCB’s
The careful assembly of the PCB is as relevant for the final equipment reliability as the
circuit design or PCB design and fabrication. When going through equipment failure statistics, this fact can easily be verified.
Assembly techniques can vary widely from case to case. While small‐scale production is fully based on manual performance, automation plays an important role in high‐volume assembly, especially in countries where manual labour is a main cost factor. Assembly techniques also undergo changes in the course of time with the accumulation of experience and with the introduction of new component types. A review on assembly techniques can therefore give an account of the present state of the art.
To fit the scope of this book, the emphasis will be laid more on smaller production volumes with manual assembly techniques.
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3. Control transition times in digital signals
It is not uncommon to see products fail to meet emissions requirements at frequencies that are 10 ‐ 100 times the fundamental clock frequency. However, by controlling the rise‐ and fall‐times of the signal, it is possible to attenuate these upper harmonics significantly without degrading the signal quality or bit error rate. Signal transition times are readily controlled by choosing logic families that are appropriate to the task or (for capacitive loads) by putting a resistance in series with the source. 4. Provide a solid (not gapped) signal return plane
This rule is essentially a corollary to the first rule, but it deserves special mention. Radiated EMI problems often result when well meaning designers cut a gap in a signal return plane forcing high‐frequency currents to find their way back to the source by high‐impedance paths. Often the gap is created in an attempt to avoid a perceived susceptibility problem. Although there are a few circumstances where a gap in the plane is called for, this is a decision that should be part of a well thought‐out plan. Solid return planes should never be gapped just to comply with a guideline or an application note.
GUIDELINES FOR COMPONENT PLACEMENT
• Connectors should be located on one edge or on one corner of a board.
The purpose of this guideline is to make is easier to comply with Guideline #2 above.
• A device on the board that communicates with a device off the board through a connector should be located as close as possible to that connector.
• Components not connected to an I/O net should be located at least 2 cm away from I/O nets and connectors.
I/O lines represent one of the easiest ways to couple unwanted energy on or off the board.
• All off‐board communication from a single device should be routed through the same connector.
This is to prevent radiated emission and susceptibility problems as described under Guideline #2 above.
• Clock drivers should be located adjacent to clock oscillators. This is consistent with the idea of minimizing loop areas (see Guideline #1 above).
GUIDELINES FOR TRACE ROUTING
• All power planes and traces should be routed on the same layer. This helps prevent unwanted noise coupling between power buses. It usually results in an efficient layout, since no two devices require the same power at the same point and devices using the same power bus are generally grouped.
• Critical signal traces should be buried between power/ground planes. Signals on traces between solid planes are less likely to interact with external sources or antennas. • No trace unrelated to I/O should be located between an I/O connector and the
device(s) sending and receiving signals using that connector.
• Signals with high‐frequency content should not be routed beneath components used for board I/O.
I/O lines represent one of the easiest ways to couple unwanted energy on or off the board.
• Critical nets between planes should be routed at least 2 mm away from the board edge.
Signals on traces very close to the board edge are more easily coupled onto and off from the board.
• On a board with power and ground planes, no traces should be used to connect to power or ground. Connections should be made using a via adjacent to the power or ground pad of the component.
Traces take up space on the board and increase the inductance of the connection.
• On boards with multiple signal return planes, all vias connected to one signal return plane should also connect to the others.
Attempts to control the flow of signal return currents by connecting to different planes usually create more problems than they solve. It is generally desirable to have all return planes in a PCB at the same potential. They should be shorted together at every opportunity.
The trace width formulas are: I = 0.0150 x dT 0.5453 x A0.7349 for internal traces I = 0.0647 x dT0.4281 x A0.6732 for external traces where: I = maximum current in Amps dT = temperature rise above ambient in °C A = cross‐sectional area in mils²
GUIDELINES FOR BOARD‐LEVEL DECOUPLING
Due to unwanted coupling of Power Sources with subsystems, High Speed Switching transience Occur. Decoupling is the process of preventing undesired coupling between subsystems via the power supply connections. A Capacitor is placed in Shunt to the Power Source (or the Source that may couple) which will absorb the transient current.
1.1 Boards with closely spaced planes
• On boards with closely spaced (i.e. less than 0.25 mm) power and ground planes, the location of decoupling capacitors is not nearly as important as the inductance associated with their connection to the planes
• Decoupling capacitors should be connected directly to power/ground planes using vias in or adjacent to the pads.
• It is unnecessary and ineffective to use capacitors with a nominal value that is less than the board's interplane capacitance. At low frequencies, higher values of ca‐pacitance are desirable. At high frequencies, connection inductance is much more important than the nominal value of the capacitor.
• Power supply leads from active devices and decoupling capacitors should be connected directly to the power and ground planes. No attempt should be made to connect chip leads directly to a decoupling capacitor.
1.2 Boards with widely spaced planes
• On boards with widely spaced (i.e. greater than 0.5 mm) power and ground planes, a local decoupling capacitor should be located near each active device. If the active device is mounted on the side of the board nearest the ground plane, the decoupling capacitor should be located near the power pin. If the active device is mounted on the side of the board nearest the power plane, the decoupling capacitor should be located near the ground pin {
• Decoupling capacitors should be connected directly to power/ground planes using vias in or adjacent to the pads. Decoupling capacitors can share a power or ground via with the active device if this can be accomplished without traces (or with a traces length less than the power/ground plane spacing).
• It is unnecessary and ineffective to use capacitors with a nominal value that is less than the board's interplane capacitance. At low frequencies, higher values of ca‐pacitance are desirable. At high frequencies, connection inductance is much more important than the nominal value of the capacitor.
1.3 Boards with no power plane
• On boards with no power plane, a local decoupling capacitor should be located near each active device. The inductance of the decoupling capacitor connection between power and ground should be minimized. Two local decoupling capacitors with a few centimeters of space between them, can be used to provide more ef‐fective decoupling than a single capacitor
Board Zoning
Board zoning has the same basic meaning as board floor planning, which is the process of defining the general location of components on the blank PCB before drawing in any traces. Board zoning goes a little bit further in that it includes the process of placing like functions on a board in the same general area, as opposed to mixing them together (see Figure 10). High‐speed logic, including micros, are placed close to the power supply, with slower components located farther away, and analog components even farther still. With this arrangement, the high‐speed logic has less chance to pollute other signal traces. It is especially important that oscillator tank loops be located away from analog circuits, low‐speed signals, and connectors. This applies both to the board, and the space inside the box containing the board. Do not design in cable assemblies that fold over the oscillator or the microcomputer after final assembly, because they can pick up noise and carry it elsewhere.
In prioritizing component placement, the most important things to do in PCB design are:
• Locate the microcomputer next to the voltage regulator, and the voltage regulator next to where VBatt enters the board.
• Built a gridded or solid ground between the three (forming a single‐point ground), and tie the shield at that point.
Board Zoning
Grounding Strategies for Printed Circuit Boards
Design and layout of a printed circuit board (PCB) for electromagnetic compatibility (EMC) is probably the most cost‐effective measure possible in the quest for EMC compliance. It is cost‐effective because it requires no additional components. It requires just the knowledge of EMC layout methods and experience in applying them. Some critical errors in layout that can cause an EMC problem cannot be resolved simply through the application of additional filters; relaying the PCB may be the only solution, and getting it right the first time therefore offers the lowest‐cost approach.
Zoning
The idea behind this principle is to reduce the coupling between circuits by basic physical separation. The actual amount of separation is difficult to specify for all applications and, of course, depends on the wavelengths of the signals in each section (one‐quarter‐wavelength gaps being a minimum). As a basic guide, a 5‐mm gap between circuits all around is usually adequate.
Zoning of circuits is usually performed by using a moated (empty) area around each circuit or functional block. Hence, some patterning is required of any ground and power planes. Patterning the ground and supply rails prevents a power surge or noise voltage on one circuit block (which may be able to handle the event) from being returned via the ground on another circuit block (which cannot tolerate such an event). Although the ground connections and supply rails may meet at the power input to the PCB, by separating, the loops for supply and ground return are controlled for each circuit.
Figure 1. Zoning: separation of circuits by function or operating speed.
Function and operation speed should segment circuits. High‐speed digital circuits tend to have high instantaneous current demands at clock edges, and therefore these circuits should be placed closer to the power supply unit (PSU) inlet than slower circuits such as analog functions and interface circuits (see Figure 1). It is important to note that it is not the absolute power demand that causes EMC problems within a system, but rather transients in the power demand.
Circuits that will interface with the outside world or with other PCBs within the end system must be near the PCB edge; there should be no trailing wires across a PCB within a system. Some circuits on a PCB are known to be noisy or are intended to handle dirty signals from off‐board systems. Filtering might be required at these circuit inputs, so a secondary Zoning within the circuit block might be required to handle the off‐board signal filters at the PCB interface. A separate moated ground plane for interface circuits would be another good EMC measure, especially if the system has a safety ground (or an EMC ground) that could be referenced for electrostatic discharge (ESD) and transient suppression circuits directly at the interface socket.
Grounding Patterns
The main objective of a grounding pattern is to minimize the ground impedance and the size of any potential ground loops from a circuit back to the power supply. Note that this is not simply minimizing the resistance at the frequencies of interest for EMC; it is inductive reactance of the tracking that usually dominates the impedance characteristic.
Guard Ring. This is a ground‐connected track that does not carry a return current for the circuit under normal operation. Its purpose is mainly to serve as a return source for radio‐frequency current radiating out of, or incident to, the PCB (see Figure 2). It is usually tracked around the outer edge of a PCB and around connectors and input‐output circuits. If a separate safety ground is being used, the guard ring can be connected to this rather than system ground, and safety or ESD devices could sink their current via this track. The guard ring can act as a field‐fringing sink and can be placed around the edge of a power plane, as well as around the tracking layers.
Figure 2. Guard ring. The grounded track normally carries no current.
Single‐Sided Ground Tracking. A grounding strategy can still be implemented on a single‐sided PCB. The first consideration is to plan for a wide ground track covering as much of the PCB as possible. Do not attempt a ground plane and then etch out the plane for tracking. Doing so can actually cause more problems than it solves because it could leave unconnected metallized areas within the PCB that reflect signals through the board or act as receivers and inject capacitively into nearby tracks. It is preferable to attempt a star arrangement of connecting ground and power, but this can be difficult with only single‐layer tracking.
Using inductor‐capacitor filters at the input to each circuit segment from a daisy‐chained power rail could compensate for the limited available tracking because the inductors from the supply rail can be used as bridging components. A guardrail can be placed around the edge of a PCB, connecting to the ground at the input to the PCB only. Even on a single‐sided board, this approach helps reduce field fringing at the board edge. If a shield proves necessary, leaving the guard ring as a solder‐masked track provides a suitable place to attach the shield.
Ground Grid (Ground Matrix). A ground grid forms a series of box sections on the PCB. A ground area beneath each integrated circuit (IC) on the component side also helps (even if a full grid cannot be implemented); decoupling capacitors can be tied directly to the IC supply line using this area. To maintain low impedance, a thick track for the ground grid is preferred, but with high‐pin‐count surface‐mount components, a thick track is not always possible. A thin track completing the grid is better than no track at all. Even though a thin track is not a particularly low‐impedance solution, it still minimizes loop areas for both ground currents and signal‐return paths.
Mirror Supply Lines. For ground grids to be truly effective at minimizing signal loops, a similar pattern for the supply should be attempted, mirroring the ground paths wherever possible (see Figure 3). However, it is not necessary for the supply path to completely grid the same way the ground does. Comb or star supply arrangements can be very effective when coupled with a complete ground grid (comb patterning should not be used on grounding schemes).
Figure 3. Mirror supply and ground paths. A thinner power track reduces field fringing.
Having the supply track slightly narrower than the ground helps reduce supply field fringing and reduces crosstalk from the supply rail to nearby signal tracks.
Safety or ESD/EMC Ground. A separate safety ground designed as either a plane or a guard track is particularly useful where signals enter and exit the system. Often the safety ground cannot be used over a complete PCB plane because the leakage current specifications are exceeded by capacitive coupling effects. A low‐value decoupling capacitor between the signal and safety ground, and close to any off‐board signal connectors, provides a high‐frequency current link between system and safety references. Capacitive coupling between analog and digital grounds close to any signal interface should also be planned to capacitively bridge any moat region at the signal interface.
Plan and Lay Out Grounds
On a multilayer PCB, the ground and power planes should be planned first. If one of the supply planes has to be sacrificed for tracking, it should always be a power plane. The ground plane should be maintained intact wherever possible.
Increasing the PCB stack and including one or more ground planes can solve many EMC problems encountered with both single‐ and double‐sided PCB designs. A preferred stack would have ground and power planes separated by a prepreg layer (foil build) or thin laminate, with a thick laminate between power and tracking and between ground and tracking. Using a thin layer between the power and ground planes minimizes the distance between them, thereby maximizing the effective capacitance. A PCB capacitor constructed in this manner has a very high frequency response (high self‐resonant frequency) and low series inductance.
Multilayer PCB Ground Possibilities. Several of these grounding strategies, including placing a surface ground grid on digital sections with buried or even multiple ground planes, can be implemented on a PCB structure with many layers and a ground plane. Wherever there are several ground circuits, the circuits must be interconnected to maintain a low impedance and short return loops.
Copper fill, a common technique for use with some analog circuits, introduces areas of copper on the portions of the PCB surface that carry no signals and therefore should be grounded. Although this can potentially reduce field fringing and improve decoupling, the copper areas can be inadvertently left disconnected, which can induce electromagnetic interference (EMI) problems. This technique is not suitable for digital circuits because it can create differences in signal skew as well as propagation delay between tracks that could lead to functional failures. Consequently, copper fill is not particularly popular for many modern designs and should be used with care on analog circuits. Ground stitching, which refers to placing multiple vias between ground areas on different layers, can be used with guard rings and large grounded surface areas that result from copper fill. If the system's chassis is grounded, using plated through holes for the stitching points and further connecting these to the chassis can produce very quiet PCB designs.
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Some of the Jargon and Background
Core Construction: PCB fabrication process that piles up core materials with intermediate prepeg material. This method always results in an even number of layers.
Foil construction: PCB fabrication process similar to the Core Construction except in the external layers. The external layers are added using sheets of copper foil on top of prepeg material. Even though this method can theoretically produce odd number of layers it is recommended to still use an even number due to the risk of warpage and cost (it is usually cheaper to add a layer).
Prepeg: Short for pre‐impregnated material. It consists of sheets of the basic material (for example, FR4) impregnated with a synthetic resin partially cured to an intermediate stage. Prepeg is used between sheets of core material for middle layers and with copper foil on top for external layers. Copper Clad or "Core Material":: It is one of the raw materials used by PCB fab houses.
It consists of a layer of dielectric material (the most common is FR4) sandwiched between layers of copper on each face. The copper layers are generally of the same thickness. The copper thickness is usually expressed in terms of "oz.", or more correctly in "ounces per square foot". This unit is equivalent to 1.4‐mil thickness (35 microns). Most digital circuit designs use substrates of a glass/epoxy composite known as FR‐4. Commonly commercially available values of copper thickness are 0.5, 1, 2 & 3 oz.
FR4: Typical material used in digital design. FR4 is a glass fiber epoxy laminate. It is the most commonly used PCB material. "FR" stands for "Fire Retardant" (ANSI). It is usable up to frequencies in the order of 1 GHz, with losses increasing with the frequency. In digital designs, the losses are not that bad. In fact, the low Q (high loss) materials are preferred for these applications because thy help to dissipate the energy of reflections and other spurious distortions.
Padstack: The description of copper and dielectric layers constituting a PCB, specifying each thickness. It consists of a number of pre‐peg, cores and copper layers. Since the optimum padstack is PCB fab technology dependent, it is always a good idea to check a proposed padstack with your PCB house.
Microstrip: Consists of a trace running on the surface of a PCB separated by one or more layers of dielectric material from a ground plane located underneath. It is also called "surface microstrip" to distinguish it from the "coated" or "embedded" variations.
Embedded Microstrip: Similar to the plain or "surface microstrip" but buried into the dielectric material.
Coated Microstrip: Similar to the "embedded microstrip", differing from it because of the dielectric thinness on top and the construction process. The dielectric on top is usually the solder mask coating the PCB surface. It is an extreme case of Embedded Microstrip with different dielectric constant than the material below. The impedance does not usually change significantly from the regular Microstrip case except in case of very thin traces, which change a few units percent.
Stripline: Trace running between two ground planes. See under the "symmetric" and "asymmetric" variations.
Symmetric Stripline: This geometry consists of a trace running between two ground planes located in layers above and below with the same dielectric thickness and material on both sides. Asymmetric Stripline: Similar to the symmetric stripline except that the dielectric
thickness above and below the trace are different. The material is typically of the same kind.
Etching: Chemical process to remove the unwanted copper from a layer during the fab process. The copper face where the etching solution is applied results in extra etching compared with the copper layer facing the FR4 core. This effect may be important in case of very thick copper or very narrow traces.
Ground Plane: For the purpose of impedance control a well decoupled VCC plane is equivalent to a true
The following plot shows the impedance values for a couple of common values of the copper thickness (0.5 and 1 oz.) and typical FR4 material. The impedance is plotted against the trace width, for dielectric thickness from 4 through 14 mils and the plot is ordered by generally decreasing impedance.
Note: If Mother Board Design Question is asked, write about all the PCB Design techniques viz., Trace Routing, Impedance Control, Zoning etc.. Centric with Mother Board. There is no Special Technique for Mother Board Design, but it will be done with more Precaution. Present the Answer Accordingly.
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